Computing Symbolic Expressions in Analog Circuits Using Nullors
A novel method is introduced to compute symbolic expressions in analog circuits modeled by nullors. The proposed method is based on the formulation of a compact system of equations (CSEs) by manipulation of data-structures, which highly improves traditional symbolic-methods. It is demonstrated that...
| Autores: | ; ; |
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| Tipo de documento: | Artículo |
| Estado: | Published version |
| Fecha de publicación: | 2005 |
| País: | México |
| Institución: | INAOE |
| Repositorio: | Redalyc-INAOE |
| OAI Identifier: | oai:redalyc.org:61590204 |
| Acceso en línea: | https://www.redalyc.org/articulo.oa?id=61590204 |
| Nivel de acceso: | Acceso abierto |
| Palabra clave: | Computación Nullor Circuit theory Data structures Symbolic analysis Modeling and simulation |
| Sumario: | A novel method is introduced to compute symbolic expressions in analog circuits modeled by nullors. The proposed method is based on the formulation of a compact system of equations (CSEs) by manipulation of data-structures, which highly improves traditional symbolic-methods. It is demonstrated that by modeling all active devices using nullors, the CSEs is easily formulated by manipulation of both the nullor and admittance interconnection-relationships. Several examples leads us to conclude on the suitability of the proposed symbolic-method to be incorporated within a symbolic simulator. |
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