Synchronous OEIC integrating receiver for ORGA applications
This work presents a monolithically integrated synchronous optical receiver fabricated in a standard 0.35 mu m CMOS process. The receiver consists of a regenerative latch acting as a sense amplifier; two highly effective, low-capacitance pin photodiodes connected to its output nodes (one of them blo...
| Authors: | ; ; ; |
|---|---|
| Format: | Article |
| Status: | Published version |
| Publication date: | 2016 |
| Country: | España |
| Institution: | Universidad de Zaragoza |
| Repository: | Zaguán. Repositorio Digital de la Universidad de Zaragoza |
| OAI Identifier: | oai:zaguan.unizar.es:70667 |
| Online Access: | http://zaguan.unizar.es/record/70667 |
| Access Level: | Open access |
| _version_ | 1878741428569374720 |
|---|---|
| author | Sanchez-Azqueta, C. |
| author2 | Goll, B. Celma, S. Zimmermann, H. |
| author2_role | author author author |
| author_browse | Celma, S. Goll, B. Sanchez-Azqueta, C. Zimmermann, H. |
| author_facet | Sanchez-Azqueta, C. Goll, B. Celma, S. Zimmermann, H. |
| author_role | author |
| collection | Zaguán. Repositorio Digital de la Universidad de Zaragoza |
| description | This work presents a monolithically integrated synchronous optical receiver fabricated in a standard 0.35 mu m CMOS process. The receiver consists of a regenerative latch acting as a sense amplifier; two highly effective, low-capacitance pin photodiodes connected to its output nodes (one of them blocked to the light); and an adjustable reference current to compensate the dynamic offset created by the asymmetries between the parasitic capacitances of the photodiodes. For lambda = 635 nm, a sensitivity of -25.8 dBm, -26.0 dBm, and -28.4dBm is obtained, respectively, for 400 Mbit/s, 350 Mbit/s, and 250 Mbit/s (BER = 10(-9)). The power consumption is 670 mu W, which translates to an energy efficiency of 1.7 pJ/bit at 400 Mbit/s. |
| eu_rights_str_mv | openAccess |
| format | article |
| id | ES_e4fd9ea3896b4186b3e753e8a4ae70d1 |
| institution | Universidad de Zaragoza |
| instname_str | Universidad de Zaragoza |
| network_acronym_str | ES |
| network_name_str | España |
| oai_identifier_str | oai:zaguan.unizar.es:70667 |
| publishDate | 2016 |
| publishDateSort | 2016 |
| reponame_str | Zaguán. Repositorio Digital de la Universidad de Zaragoza |
| spelling | Synchronous OEIC integrating receiver for ORGA applications Sanchez-Azqueta, C. Goll, B. Celma, S. Zimmermann, H. This work presents a monolithically integrated synchronous optical receiver fabricated in a standard 0.35 mu m CMOS process. The receiver consists of a regenerative latch acting as a sense amplifier; two highly effective, low-capacitance pin photodiodes connected to its output nodes (one of them blocked to the light); and an adjustable reference current to compensate the dynamic offset created by the asymmetries between the parasitic capacitances of the photodiodes. For lambda = 635 nm, a sensitivity of -25.8 dBm, -26.0 dBm, and -28.4dBm is obtained, respectively, for 400 Mbit/s, 350 Mbit/s, and 250 Mbit/s (BER = 10(-9)). The power consumption is 670 mu W, which translates to an energy efficiency of 1.7 pJ/bit at 400 Mbit/s. http://zaguan.unizar.es/record/70667 |
| spellingShingle | Synchronous OEIC integrating receiver for ORGA applications Sanchez-Azqueta, C. |
| status_str | publishedVersion |
| title | Synchronous OEIC integrating receiver for ORGA applications |
| title_full | Synchronous OEIC integrating receiver for ORGA applications |
| title_fullStr | Synchronous OEIC integrating receiver for ORGA applications |
| title_full_unstemmed | Synchronous OEIC integrating receiver for ORGA applications |
| title_short | Synchronous OEIC integrating receiver for ORGA applications |
| title_sort | Synchronous OEIC integrating receiver for ORGA applications |
| url | http://zaguan.unizar.es/record/70667 |