High-Linearity Self-Biased CMOS Current Buffer
A highly linear fully self-biased class AB current buffer designed in a standard 0.18 mu m CMOS process with 1.8 V power supply is presented in this paper. It is a simple structure that, with a static power consumption of 48 mu W, features an input resistance as low as 89 Omega, high accuracy in the...
| Autores: | ; ; ; ; |
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| Tipo de documento: | Artículo |
| Estado: | Published version |
| Fecha de publicación: | 2018 |
| País: | España |
| Institución: | Universidad de Zaragoza |
| Repositorio: | Zaguán. Repositorio Digital de la Universidad de Zaragoza |
| OAI Identifier: | oai:zaguan.unizar.es:77196 |
| Acceso en línea: | http://zaguan.unizar.es/record/77196 |
| Nivel de acceso: | Acceso abierto |
| Sumario: | A highly linear fully self-biased class AB current buffer designed in a standard 0.18 mu m CMOS process with 1.8 V power supply is presented in this paper. It is a simple structure that, with a static power consumption of 48 mu W, features an input resistance as low as 89 Omega, high accuracy in the input-output current ratio and total harmonic distortion (THD) figures lower than -60 dB at 30 mu A amplitude signal and 1 kHz frequency. Robustness was proved through Monte Carlo and corner simulations, and finally validated through experimental measurements, showing that the proposed configuration is a suitable choice for high performance low voltage low power applications. |
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